Please see the complete documentation for an explanation of the PLL.
The phase locked loop (PLL) module synchronizes to and tracks input signals. It is comprised of four internal components: a phase comparator; a lowpass filter; a voltage controlled oscillator; and a frequency divider.
The PLL has two states: locked and unlocked. When it is locked on an input signal, the output frequency and phase from its internal VCO are related to the input frequency and phase. When it is unlocked, there are no defined relationships between input and output phase or frequency.
The PLL's output is always a slightly delayed response to its input. Therefore, changes in the input are not immediately reflected in the module's output. The delay and its transient response are based on the PLL's bandwidth and damping.
Input
The terminal on the upper left side of the PLL is the input signal terminal. Input to this terminal is interpreted by the PLL's phase comparator as a digital signal using the standard thresholds.
Output
The top right terminal outputs the digital, square wave generated by the PLL's internal VCO. The bottom right terminal outputs the demodulated signal equivalent to the control voltage of the internal VCO.
The PLL's top terminal outputs a phase pulse from the module's internal phase comparator only when that comparator is of the type frequency tri╨state.
